STMicroelectronics, STATS ChipPAC and Infineon Partner on Developing Wafer-Level-Packaging Technology

(Business News & Technology News, 12 Aug 2008)

STMicroelectronics, STATS ChipPAC and Infineon Technologies AG have signed an agreement to jointly develop the next-generation of embedded Wafer-Level Ball Grid Array (eWLB) technology, based on Infineon's first-generation technology, for use in manufacturing future-generation semiconductor packages.

ST and Infineon, two of the leading semiconductor makers worldwide, have joined forces with STATS ChipPAC, a leader in advanced three dimensional (3D) packaging solutions, to fully exploit the potential of Infineon's existing eWLB packaging technology, which has been licensed by Infineon to ST and STATS ChipPAC. The new R&D effort, for which the resulting IP will be owned by the three companies, will focus on using both sides of a reconstituted wafer to provide solutions for semiconductor devices with a higher integration level and a greater number of contact elements.

The eWLB technology uses a combination of traditional "front-end" and "back-end" semiconductor manufacturing techniques with parallel processing of all the chips on the wafer, leading to reduced manufacturing costs. This together with the increased level of integration of the silicon's overall protective package, in addition to a dramatically higher number of external contacts, means the technology can provide significant cost and size benefits for makers of cutting-edge wireless and consumer products.

ST's decision to work with Infineon to jointly develop and use this innovative technology, with its greater integration level of package size, marks an important milestone for eWLB on its way to becoming an industry standard for cost-efficient and highly integrated wafer-level packages. ST plans to use the technology in several products of its ST-NXP Wireless joint venture and in other application markets, with first samples expected by the end of 2008 and production by early 2010.

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