eASIC Delivers 45nm ASIC with Zero Mask-charges

(Product News, 6 Aug 2008)

Leveraging the rapid success of its 90nm Nextreme ASIC Products, eASIC Corp. has launched its next generation Nextreme-2 Family—said to be the semiconductor industry's first 45nm, zero mask-charge ASIC family.

Nextreme-2 delivers on eASIC's promise of affordable silicon customization, enabling the design of custom chips using state-of-the-art 45nm technology and the delivery of working devices in only six-weeks.

"Fujitsu Advanced Technologies Ltd is pleased to see that eASIC is delivering a 45nm product," says Akira Itoh, Director of the Fujitsu Circuit Technology Center of Fujitsu Advanced Technologies Ltd. "This new ASIC is able to deliver the right combination of performance, power and price combined with low up-front cost. We find the power reduction especially important as we look to add more functionality to our ICT infrastructure products."

The no-minimum order quantity, Nextreme-2 ASIC family paves the way for accelerating eASIC's market expansion into the $85 billion global logic market, the worldwide semiconductor industry's largest sector.

"Gartner has tracked ASIC design starts for years and the trend has been unmistakable, downward to the right," says Bryan Lewis, Research VP at Gartner. "Leading edge ASIC design costs have risen to the point where many small-to-medium-sized companies have no choice but to use FPGAs. New approaches are being developed that lower ASIC design costs and have the potential to bring the benefits of ASICs back to the masses."

Nextreme-2 features up to 80 percent lower power than FPGAs, has to 20M gates and 30Mb of true dual-port memory. The device also has 2.4TeraMACs of DSP performance, and up to 56 6.5Gbps transceivers and 1.25Gbps LVDS

"Judging from the magnetic draw we are seeing from the market, we are confident that FPGA designers, ASIC designers and semiconductor companies will find Nextreme-2 to be an irresistible platform for their new designs," says Ronnie Vasishta, President and CEO of eASIC. "The new ASIC era of high performance, low power and dramatic cost reduction with fast time-to-market is just beginning and we are already driving a reversal in the trend of declining design starts."

The Nextreme-2 Family is manufactured on Chartered Semiconductor's 45nm low-power (LP) process and armed with an efficient LUT-based architecture. The logic fabric provides up to 700MHz performance enabling signal processing engineers with an impressive 2.4TeraMACs of DSP capability without the need for embedded multipliers.

The combination of triple oxide transistors, 45nm LP process and eASIC's patented power-management architecture enables Nextreme-2 to lower power consumption by up to 80 percent when compared with state-of-the art FPGAs.

The Nextreme-2 Family also includes up to 56 MGIO's (multi-Gigabit IOs) each capable of operating at 6.5Gbps providing 364Gbps bandwidth. The inclusion of the MGIOs makes Nextreme-2 a compelling alternative to FPGAs and ASICs for high performance networking applications such as switches, routers, traffic management, metro transmission and mobile backhaul.

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