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Issue > Mar 2008 > Featured Technologies
 
 

A Flexible Solution for Industrial Ethernet

By: Razak Mohammed Ali, Altera Corp.
( 1 Mar 2008 )


Since its conception by Xerox in the mid-seventies and standardization as IEEE 802.3 in 1983, Ethernet has become the de facto standard for computer communication in the business world. Ethernet networks have evolved from coaxial cable-based systems delivering 3Mbps performance to systems built from unshielded twisted pair (Cat5 UTP) cables that can deliver high reliability, low cost, and 100Mbps performance. With devices capable of 1Gbps Ethernet already in the market and 10Gbps visibly on the horizon, the continuous evolution (Table 1) of Ethernet will continue to service market requirements long into the future.

The range, availability, and ease of Ethernet implementation, combined with the pressure to integrate the factory system with the corporate network, drove industrial developers to create Ethernet-based industrial networking solutions that would be compatible with, or even replace, industrial field bus communication solutions.

Today there are many Ethernet-based industrial communication protocols, each with their own individual pros and cons. Some of these protocols have been standardized and/or made "open" so that any developer can create an implementation of the protocol. Naturally, this means that the open protocols tend to be more popular and used widely across the industry.

Some solutions simply package field bus or application data into standard Ethernet packets and so require nothing more than a standard Ethernet implementation (although real-time performance is poor due to a lack of determinism). However, many industrial Ethernet protocols require additional custom software, and most of the higher performance protocols require custom hardware as well, making it difficult to develop and maintain a solution that supports multiple protocols.

Not only are there many protocols, but they continue to evolve, leveraging changes in the base Ethernet standard and improvements in technology. In order to compete, industrial equipment manufacturers must find a cost-effective way to support as many industrial Ethernet protocols as possible and be able to quickly adopt protocol changes, support new protocols, and incorporate other system improvements.

IMPLEMENTING A UNIVERSAL INDUSTRIAL ETHERNET SOLUTION
Engineering a solution to support many protocols is clearly possible—just create a series of plug-in boards, one for each protocol. But with the number of standards on the market and their constant evolution, how can a solution be cost-effective while supporting new features and additional protocols in a timely manner? Where standard Ethernet hardware is used, protocol software must be developed or ported to run on the chosen processor device. How much time will this take and will the CPU have enough processing power to run the application and the protocol?

When new industrial Ethernet ASIC/ASSP devices are required, circuit boards must be developed, bringing all the costs and delays involved with the creation of new hardware. When the Ethernet protocol is upgraded, new ASIC/ASSP devices will be developed and multiple versions of board may be required to support both legacy and new versions of the protocol. The reliance on ASIC/ASSP devices can bring supply issues and, with rapidly changing protocols, potential obsolescence of the devices. This type of solution is likely to be expensive, difficult to support, and slow to deliver new features.

However, all of these problems can be solved by implementing an industrial Ethernet interface using a FPGA device (Figure 1). One of the key benefits of FPGAs is that they can be easily re-configured; just build one circuit board and program in the hardware required for any industrial Ethernet protocol at any time, just before the product ships or even when in the field! If a different protocol is needed, or if the customer changes their order, all that is needed is to reprogram the FPGA, which is done in a matter of seconds with the required FPGA configuration file. This type of multi-standard solution greatly reduces development costs and minimizes inventory and supply chain issues. Creating a new configuration file for the FPGA device may require the development of new software or hardware, but with the Altera development tools and off-the-shelf intellectual property (IP) from Altera's partners, this can usually be easily be done with a few weeks of development time or less.

When combined with an Ethernet transceiver (known as a PHY), the FPGA device can perform all of the functions required by the Ethernet interface. The PHY and board electronics deal with the physical (layer 1) interface, and the (layer 2) media access controller (MAC) hardware functions are managed by the configured logic in the FPGA device; higher level functions (Layer 3 and up) are implemented in software running on a processor core configured into the FPGA logic. Implementing a communication channel between an existing application processor and the FPGA is easy because of the programmability of the FPGA logic, the multi-standard support of the I/O pins, and the availability of a wide range of off-the-shelf interface IP. Usually, an existing interface in the processor device or system can be used to communicate with the FPGA. This approach has the additional advantage of requiring minimal computing time and changes to the application software running on the existing processor. This preserves the status of the system software and delivers additional processing resources to deliver a high-performance implementation of the industrial Ethernet stack processing.

As the FPGA hardware is programmable, a system that contains two or more soft microprocessor cores can be created, enabling integration of the application processing into the FPGA device, if this is advantageous. Benefits of this type of system integration can include reductions in component count, cost, and power consumption. In addition, an entirely IP-based design is protected against obsolescence by the long device lifetime of the FPGA device and the ability to migrate easily to newer generations. FPGAs also provide the opportunity to accelerate system performance by implementing computationally intense functions as FPGA hardware instead of software, thus delivering a more efficient implementation and bringing the benefits of higher performance, lower clock speed, and lower power consumption.

Not only does an FPGA allow off-loading of application tasks to a processor or hardware implemented in FPGA logic, but the flexibility of the FPGA device also allows the implementation of new interfaces in the system, including simple communication interfaces (e.g., UARTS, parallel I/O, etc.), more complex features like support for new memory standards (e.g., DDR2/3, etc.), or the latest communication technologies.

BUILDING A FPGA-BASED HARDWARE DESIGN
Creating a processor and Ethernet MAC hardware design may sound difficult, but, in fact, due to a tool called SOPC Builder and the availability of pre-built processor and Ethernet MAC IP components, it is a relatively straightforward task. SOPC Builder is integrated within Altera's Quartus II development environment and was designed specifically to support the easy creation of IP-based system-on-a-programmable-chip (SOPC) designs.

The developer designs a system using a graphical user interface (GUI) instead of coding HDL; SOPC Builder accelerates and automates the configuration, integration and generation of IP-based systems. The tool GUI has a list of available IP. Once an IP module is chosen, the system allows the selection of the appropriate options. Once this is completed, the configured IP component will appear in the current system design. The component base address or interrupt levels can then be changed, and the interconnect architecture of the system can be modified using the GUI to change the connections between the IP components. This process (illustrated in Figure 2) allows the quick design of modular and/or highly optimized systems. Design errors are flagged in the bottom window so the designer can easily identify and fix problems like address conflicts or incorrect component connections.

Once the system design is complete, the designer clicks on the "generate" button and the tool generates all of the HDL required to build a working system. As the IP is pre-built and tested by the vendor, and the system interconnect is machine-generated, the design is correct by construction and requires minimal IP effort to implement. Once the system is generated, it appears as a design block in the Quartus II schematic editor. Hardware synthesis, a single-button operation for most SOPC Builder generated systems, then creates a configuration file that can be downloaded into the FPGA device. If, later on, a new or modified design is needed, the designer just opens the SOPC Builder tool, modifies the design through the GUI, re-generates the system, and re-synthesizes it with Quartus II software to create another configuration file. This means a hardware design for a new industrial Ethernet protocol can be created by purchasing the hardware IP required and dropping it into the existing system design and re-generating. One click to re-synthesize and within a short time the hardware is ready!

RUNNING SOFTWARE PROTOCOLS ON THE NIOS II PROCESSOR
In embedded systems that include Ethernet support, the processor provides the higher layer functions (e.g., TCP, UDP, etc.). Altera's royalty-free, 32-bit RISC Nios II processor comes in three binary compatible variants, each optimized for different ratios of size and performance (Table 2): Nios II/f for high performance, Nios II/e for minimum size, and Nios II/s for a balance of size and performance. As the Nios II processor is delivered as an SOPC Builder IP component, it is easy to create processor-based systems that include Ethernet MAC IP, a range of other peripheral components, or even multiple Nios II processors. With the SOPC Builder GUI, it is easy and quick to build a Nios II processor system that meets the designer's exact requirements, and even to create different versions for different applications.

Being SOPC Builder ready, the Nios II processor is compatible with the free IP that is delivered with the Quartus II software. This IP includes modules for standard processor peripheral functionality, as well as a wider range of additional IP components available from Altera and partners.

Where appropriate, these components are delivered with a Nios II driver that is automatically integrated into the software build system by the Nios II software development environment, which supports development in C and assembler, and is based on Eclipse and GNU.

HARDWARE AND SOFTWARE IP
At present, there are commercially available IP packages for seven different industrial Ethernet protocols, as shown in Table 3. Hardware IP is usually packaged as a SOPC Builder component that contains the MAC and any additional logic required. Software IP is delivered as a library or software API written in C for the Nios II processor. Some vendors market pre-built FPGA configurations, enabling designers to use the FPGA device as easily as an off-the-shelf ASIC/ASSP component.

SUMMARY
Ethernet technology for the industrial market brings many benefits and is expected to show strong growth over the next five years. There are many industrial Ethernet protocol solutions available, each with their own particular set of advantages, but clearly Ethernet technology will continue to advance, driving the evolution of both new and current industrial Ethernet solutions.

Technologies such as 1-Gbps and 10-Gbps Ethernet and real-time improvements to the current ie 802.3 standard will deliver higher performance and better reliability. Also, the focus on other industrial areas such as security and safety protocols will undoubtedly continue to drive change in industrial Ethernet standards, providing a constant challenge to industrial equipment manufacturers. The advent of low-cost FPGA devices and soft microprocessor IP has enabled a cost-effective programmable solution for industrial Ethernet. FPGAs deliver the ability to support any Ethernet-based industrial communication protocol from the same base hardware as well as the benefits of system integration, flexibility, and obsolescence protection that come with programmable devices.

As existing protocols evolve, leaving behind legacy implementations, and more new protocols emerge, it is increasingly important to have a flexible, cost-effective solution that can support any industrial Ethernet protocol. Implementing industrial Ethernet in FPGA has become a must for all industrial equipment manufacturers.

About the Author
Razak Mohammed Ali is product marketing manager, Asia Pacific, for Altera Corp., www.altera.com.

Acknowledgements
Stefano J. Zammattio, Sr. Product Marketing Engineer, Altera Corp.

Stefan Weiher, Product Manager, IXXAT GmbH

Click here for Illustrations:


Figure 1, Figure 2, Table 1, Table 2, Table 3


 
 
 
 
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