Next Generation Digital Tools for Filter Designs

By: By Sam Shearman, Senior Product Manager, National Instruments
( 1 Jul 2005 )

The rapid growth of the wireless industry has led engineers to face seemingly contradictory design guidelines. Despite shorter design cycles, engineers often are called upon to push increasingly powerful and complex designs to market.

One way to compensate for these and other high-level issues is to simplify the design process by using common software tools for multiple tasks. Doing so can facilitate code reuse across these tasks, but more importantly, it can foster collaboration by allowing different groups to more easily understand and utilize the work of the others. The Digital Filter Design Toolkit (DFDT) Version 7.5 is a software add-on for the LabVIEW graphical development environment. As a design tool that is integrated into a general purpose development environment, the DFDT facilitates both interactive and automated design that can be incorporated into aspects of the design process: from initial specification, design, to implementation.

Facilitating the Design Process
Digital filter design typically follows the design flow shown in Figure 1. The process starts with specification of desired filter attributes. Tointeractively specify and design a filter, the toolkitincludes tools for classical filter designs and design through placement of poles and zeros. As engineers modify parameters, the interface immediately shows the magnitude response and pole/zero locations on the Z-plane based on your selections.The pole-zero design tool (Figure 2) allows clickand- drag placement of poles and zeros on the Zplane. Engineers also can programmatically design these and other filter types with included VirtualInstruments (VIs). VIs are the subroutines of the LabVIEW graphical programming language that allow engineers to easily wire into custom applications.



The toolkit includes more than 25 design algorithms ranging from classical (Butterworth, Chebyshev, Window, etc.) to modern optimal options, including the Remez exchange (for arbitrary magnitude FIR filters and multirate filters) and Least Pth norm (for arbitrary magnitude and phase FIR/IIR).

Design Analysis
To analyze the design, the toolkit provides Vis to plot frequency response, pole/zero locations, group delay, phase delay, impulse response, and step response. It also installs a set of “processsignal” VIs that allow engineers to further evaluate the potential design by applying it to a signal. Designers can easily access live, simulated, and previously acquired signals. To implement a filter, simply wire the design and signal into an appropriate process signal VI from the toolkit.

If the engineer is planning to deploy a floatingpoint design, they can export the results of the design as a set of floating-point filter coefficients. They also can deploy it using the process signal Vis within a custom LabVIEW application.

Fixed-point Implementation
Although floating-point designs might be complete at this point, fixed-point design continues with modeling of quantization effects. This job involves specifying how the floating-point design will be converted to a fixed-point implementation. Engineers start by assigning a filter structure, selecting from the 23 possibilities supplied with the toolkit; these range from the Direct Form and Cascaded Form to Lattice AR (Auto-Regressive), Lattice MA (Moving Average), and Lattice ARMA (Auto-Regressive and Moving Average).

After selecting a structure, the engineer can specify how the model will represent the filter coefficients and how it will handle overflow and rounding. The toolkit provides tools that use these constraints to quantize the floating-point coefficients and simulate the application of the filter.

The next step is to analyze and validate the fixed-point filter. The engineer can examine any of the same set of plots that were available for the floating point design here, with the fixed-point result superimposed for easy comparison. They also can examine an available quantization report thatshows the floating-point coefficients and the quantized fixed-point coefficients side-by-side with counts of the number of zeroed/saturated values. An available simulation report shows min. and max. values for the operations associated with applying the filter.

Deploy the Design
Based on these results, the engineer can decide whether to revisit the design until it meets his specifications. Alternatively, he can proceed with implementing his design. To this end, the toolkit includes automatic code generation capability that can create code types that includeANSI-C, integer LabVIEW, and LabVIEW/FPGA. The latter can be deployed with the LabVIEW/FPGA module, allowing the designer to embed the code in an FPGA.

Compact Simulator
AR introduces a new version of its CWS500D compact Simulator manufactured by EM Test for the AR Worldwide RF/Microwave Instrumentation division. The addition to the CWS500D testing resume is the Avionics Specification DO-160 Conducted Susceptibility Test. The unit will be capable of testing to the highest levels of the DO-160 spec, which are Categories R, S, T, W, and Y. The CWS500D simulator includes the signal generator, bi-directional coupler, power amplifier, 3- channel power meter, controller, and Windowsbased operating software. AR Worldwide

Extraction Tool
Magma announces QuickCap NX, an enhanced version of its gold-standard QuickCap parasitic capacitance extraction tool. The key capabilities that have been added allow the tool to better address design challenges that occur in 90 nm and smaller process technologies. With advanced new process modeling, technology model encryption, a parallel execution mode, reference-level SPICE netlist generation, and a 3D graphics viewer, users can shorten the design cycle by predicting silicon performance. Magma Design Automation Inc.

Mixed Signal Option
LeCroy’s MS-32 is a Mixed Signal Option that adds full 32 digital channel support to most 4 channel WaveSurfer 400 and WaveRunner 6000A Series of high performance oscilloscopes. Targeted for applications such as embedded controller testing, where multiple analog signals (comparators, voltage sources, sensor/actuator signals, etc.) are coincident with digital signals (address or data lines, control signals, or peripheral serial data signals), the MS-32 enables users to operate more efficiently, with fewer reconnections and faster time to results, compared to solutions with only 16 digital channels. The MS-32 and a LeCroy 4 channel WaveSurfer 400 or WaveRunner 6000 oscilloscope combine 4 analog channels with 32 digital channels to provide a 4+32 solution. This is a significant performance improvement over current 2+16 or 4+16 solutions. LeCroy

Mixed Signal Oscilloscopes
Agilent introduces 12 portable digital storage and mixed signal oscilloscopes (DSOs/MSOs) with bandwidths of 300 MHz and 500 MHz, and a portable 1 GHz offering. With a realtime display update, the Agilent 6000 series can show critical events in complex waveforms, reducing design verification and debug time. These oscilloscopes feature Agilent’s MegaZoom III display technology, which provides real-time, high-resolution XGA waveform viewing with 256 levels of color-intensity grades, and memory depth up to a full 8 Meg points. The 6000 Series oscilloscopes come standard with LAN, GP-IB, and USB interfaces, as well as an additional front-panel USB port to replace limited capacity floppy drives. The front panel USB port lets designers store large memory records, screen images and settings on standard higherspeed, higher-capacity USB memory sticks. Agilent Technologies Inc.