Vishay’s Asymmetric Dual TrenchFET Power MOSFET in PowerPAIR 6mm by 3.7mm Package
(Product News, 22 Jun 2009)
Vishay Intertechnology Inc. introduced the first device in a series of copackaged, asymmetric power MOSFET pairs that reduces the space required for the high- and low-side power MOSFETs in dc-to-dc converters. The “industry-first” SiZ700DT in the new PowerPAIR package, which measures 6mm by 3.7mm, combines a low-side and high-side MOSFET in one compact device while still obtaining low on-resistance and high maximum current, saving space over using two discrete solutions. The height of PowerPAIR is 0.75mm typical, or 28 percent thinner than the PowerPAK 1212-8 and PowerPAK SO-8, which both have a 1.04mm profile.
Before the PowerPAIR package type, designers would have to use two single devices to achieve the low on-resistance and high maximum current required for system power, POL, low-current dc-to-dc, and synchronous buck applications in notebooks, VRMs, power modules, graphic cards, servers, and gaming consoles, and dc-to-dc conversion in industrial systems.
For example, the regular dual PowerPAK 1212-8 has an on-resistance of about 30mΩ with a maximum current below 10A, not making it a viable option. A single PowerPAK 1212-8 has on-resistances down to the 5mΩ range. The low-side Channel 2 MOSFET of the SiZ700DT, however, offers a comparable on-resistance of 5.8mΩ at 10V and 6.6mΩ at 4.5V, and a maximum current of 17.3A at + 25 °C and 13.9A at+ 70°C. In addition, the high-side Channel 1 MOSFET features an on-resistance of 8.6mΩ at 10V and 10.8mΩ at 4.5V, and a maximum current of 13.1A at + 25°C and 10.5A at + 70°C. These specifications allow designers to use one device, saving solution cost and space, including the clearance and labeling area in between the two discrete MOSFETs. In some lower-current and lower-voltage applications, the PowerPAIR device could even be used to replace two SO-8-packaged MOSFETs, saving at least two-thirds on space.
By having the two MOSFETs already connected inside the PowerPAIR package, layouts are made easier and parasitic inductance from PCB traces are reduced, increasing efficiency. In addition, the SiZ700DT's pinning is arranged so that a typical buck converter's input is on one side and its output is on the other, further simplifying the layout.